Lorenzo Asquini

About Me

I am a software engineer currently working at Pascal Researchon low-latency trading systems. I hold a Master's degree in Computer Science from ETH Zürich, with a major in Data Management Systems and a minor in Information Security.

I focus on writing highly optimized software to get the best possible speed and efficiency. I use these techniques to solve complex technical problems in finance.

Work Experience

Pascal Research

Software Engineer (Remote)

Full-time | June 2026 - Present

  • Building and maintaining trading and market-making systems in C++ for prediction markets.
Ribot

Technical Co-Founder & Software Engineer (Remote)

Part-time | September 2025 - April 2026

  • Designed, implemented, and deployed systems in C++ for continuous trading and low-latency arbitrage across prediction markets, supporting roughly $2.5M in weekly volume.
Optiver

Software Engineer Intern (Amsterdam, NL)

Internship | July 2025 - August 2025

  • Designed and implemented a server automating trade confirmations using the FIX protocol, saving tens of minutes daily and reducing errors in trade handling.
ETH Zürich

Student Teaching Assistant (Zürich, CH)

Part-time | February 2025 - June 2025

  • Prepared and graded homework assignments for the Advanced Systems Lab course.
Synthara

Software Engineer Intern (Zürich, CH)

Internship | June 2024 - September 2024

  • Implemented and integrated multiple features in a functional simulation model written in C++ to accurately replicate Synthara's custom hardware behavior.
  • Designed, implemented, and deployed automated tests written in C++ to verify the correct functionality of Synthara's custom hardware.

Publications

Accelerating Triangle Counting with Real Processing-in-Memory Systems

Lorenzo Asquini, Manos Frouzakis, Juan Gómez-Luna, Mohammad Sadrosadati, Onur Mutlu, Francesco Silvestri

IPDPSW '25|arXiv '25

Education

Master in Computer Science

ETH Zürich, Zürich, Switzerland

September 2023 - June 2026

Grade: 5.8/6, with distinction

Thesis:Yet Another Torch Compiler: Design and Evaluation of a CPU Compilation Framework for PyTorch

Relevant Courses:Advanced Systems Lab, Compiler Design, Computer Architecture, Design of Parallel and High-Performance Computing

Bachelor in Computer Engineering

Università degli Studi di Padova, Padua, Italy

September 2020 - July 2023

Grade: 110/110 cum Laude. GPA: 29.75/30

Thesis:Approximate triangle counting with vertex coloring on the UPMEM architecture

Relevant Courses:Algorithms for Engineering, Computer Architecture, Operating Systems

Last updated on: 2026-08-02